Description: FIFO电路(first in，first out)，内部藏有１６ｂｉｔ×１６ｗｏｒｄ的Dual port RAM，依次读出已经写入的数据。因为不存在Address输入，所以请自行设计内藏的读写指针。由FIFO电路输出的EF信号(表示RAM内部的数据为空)和FF信号(表示RAM内部的数据为满)来表示RAM内部的状态，并且控制FIFO的输入信号WEN(写使能)和REN(读使能)。以及为了更好得控制FIFO电路，AEF(表示RAM内部的数据即将空)信号也同时输出。-FIFO circuit (first in, first out), internal possession of 16bit × 16word the Dual port RAM, in order to read out has been written into the data. Address because there is no input, so please read and write their own design containing the pointer. By the FIFO circuit output signal of the EF (express the internal data RAM is empty) and the FF signal (that the internal data RAM or above) to express the state of internal RAM and FIFO control of the input signal WEN (Write Enable) and REN ( Reading-enabled). As well as a control in order to better FIFO circuit, AEF (express the internal data RAM is about to air) signal output at the same time. Platform: |
Size: 1024 |
Author:史先生 |
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Description: 该FIFO应当提供用户读使能和写使能输入控制信号，并输出指示FIFO状态的非空和非满信号，FIFO的输入、输出数据使各自的数据总线：in_data和out_data。-The FIFO should be provided to enable users to read and write enable input control signal, and outputs instructions FIFO status signals of non-empty and non-full, FIFO input and output data to make their respective data bus: in_data and out_data. Platform: |
Size: 104448 |
Author:terry |
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